The program is creating an innovative design ecosystem consisting of digital/wireless design IP and fully automated methodologies to drastically lower the currently high design and economic barrier to entry of FDSOI technologies, and fully harness the capabilities enabled by dynamic back biasing. Direct design porting from conventional bulk CMOS to FDSOI and the enablement of rapid design cycle will equip companies (from SMEs to MNCs) with strong design capabilities and seamless dynamic back biasing handling. This favors value capture from the fast-rising global demand for always-on intelligent and connected silicon systems, which is being spurred by the convergence of IoT and AI.

The shared FD-SOI design ecosystem is created by transferring new knowledge (via educational programs) and design capabilities (via IP and methodologies) to each company joining the FD-fAbrICS consortium. The proliferation of design IP/methodologies is enabled by a simple one-to-many structure based in Singapore, where the Consortium interacts directly with each joining company and shares the design technologies being spurred by research and demonstration activities, and helps coordinate design technology roadmapping.